The present invention relates in general to thin-film transistor circuits and, in more particular, to a thin film transistor circuit which is utilized as the transistor matrix array of a thin display device, such as a liquid crystal display device.
A thin display device which includes a drive circuit comprised of a transistor matrix array has recently been developed. A liquid crystal (LC) display panel, electroluminescence (EL) display panel and electrochromic (EC) display panel are included among thin display devices.
According to the conventional thin display device, image information is stored in a transistor matrix array provided on a substrate, for every dot. The image information thus stored is displayed in accordance with the above-mentioned matrix dots in the liquid crystal layer, EL layer, or EC layer which is disposed on the matrix array.
The display region of the display device which includes the transistor matrix array therein is divided into a matrix of, e.g., m.times.n (where, m and n are positive integers); and, accordingly, it has (n.times.m) unit picture elements. A picture element circuit having a memory function is so provided as to correspond to each unit picture element section. Fundamentally, each picture element circuit has a thin-film transistor (TFT) which serves as a transfer gate, and a capacitor for storing a picture element image signal. When the voltage corresponding to the image signal is applied to this capacitor, the capacitor holds this voltage and then applies it to the display layer at a proper time, thereby driving the picture elements to be displayed. One important factor in obtaining a good image display pertains to the fact that the voltage to be applied to the capacitor is efficiently supplied to the display layer, upon its display. However, according to a conventional thin display device such as an LC display panel, the transistor included in the picture element circuit has an undesirable parasitic capacitance between the gate-drain electrodes. Thus, since the above-mentioned signal voltage, which is stored in the capacitor, might be reduced by this parasitic capacitance component, the voltage value to be actually supplied to the display layer could be smaller than the normal value of the signal voltage which was previously applied. The reduction of the signal voltage to be supplied to the display layer interferes with the good image display characteristics of the display layer. Particularly in the case where the transistor is made from a thin-film semiconductor material such as amorphous silicon, the width of the transistor's channel region must be enlarged to sufficiently reduce the ON resistance of the channel, since the above-mentioned material has small electric field effect mobility. In this case, the parasitic capacitance component, which is included in the picture element circuit, increases with an increase in the channel width of the switching TFT. Consequently, the reduction of the image signal voltage due to the parasitic capacitance is further exaggerated, rendering the operation of the display device by the transistor matrix array difficult. This problem has been as major obstacle to the realization of a thin display device which includes a transistor matrix array employing a TFT made from a semiconductor material with low carrier mobility.